two companies,

twenty years behind

Problem statement

Spacecraft computers must function reliably in radiation environments that would destroy commercial electronics within hours — galactic cosmic rays, solar particle events, and trapped radiation belts cause single-event upsets, latchup, and cumulative total ionizing dose degradation. The only available radiation-hardened processors (BAE Systems RAD750, Honeywell RH32/RHPPC) deliver performance roughly equivalent to 1990s–2000s desktop computers, while the missions they must support — autonomous navigation, real-time science processing, AI-driven decision-making — increasingly demand modern computing capability. The technology gap exists because the radiation-hardened electronics market is too small (~$1.8B globally) to justify the billions in fabrication investment needed to advance to modern process nodes, creating a structural 15–20 year lag behind commercial state of the art.

Why this matters

NASA's #3 and #6 ranked civil space shortfalls are both computing-related: high-performance onboard computing and extreme-environment avionics. Deep space missions face communication delays of up to 24 minutes (Mars), making real-time ground control impossible — spacecraft must make autonomous decisions using onboard processors that are orders of magnitude slower than a modern smartphone. The Europa Clipper mission will accumulate 2.9 Megarad total ionizing dose behind 100 mil aluminum over its 10-year mission life. ESA has identified 41 critical technology dependencies, with radiation-hardened microelectronics among the most strategically sensitive — European missions currently depend on ITAR-restricted U.S. components, and a single export policy change could ground European space programs.

What’s been tried and why it hasn’t worked

Radiation hardening by design (RHBD) uses specialized circuit layouts (guard rings, triple modular redundancy, error-correcting codes) to mitigate radiation effects, but these techniques consume significant die area and power, limiting the density and performance achievable at any given process node. Radiation hardening by process (RHBP) uses specialized semiconductor fabrication (silicon-on-insulator substrates, hardened gate oxides), but these specialized foundry processes are maintained by only two primary U.S. suppliers (BAE Systems Manassas, Honeywell) plus a few European efforts (e.g., ST Microelectronics). Commercial-off-the-shelf (COTS) approaches — flying commercial processors with software-based fault tolerance — reduce cost but increase system complexity, power consumption, and mass while providing inadequate protection against destructive single-event latchup in high-radiation environments. BAE Systems' next-generation RAD5500, fabricated on a commercial GlobalFoundries 12nm node, promises 2x the RAD750's performance but remains far behind current commercial processors.

What would unlock progress

The fundamental challenge is economic: radiation-hardened chip production volume is too low to amortize advanced fabrication costs. Potential unlocks include: (1) using commercial foundry processes (Intel, GlobalFoundries, TSMC) with radiation-hardening IP overlays rather than dedicated fabrication lines — BAE/GlobalFoundries and BAE/Intel collaborations are early steps; (2) chiplet-based architectures where radiation-critical functions (memory controllers, I/O) are hardened while compute cores use commercial silicon with software mitigation; (3) FPGA-based reconfigurable computing that can adapt to radiation-induced faults in-flight; (4) fundamentally radiation-tolerant device physics (wide-bandgap semiconductors like GaN or SiC for power electronics; photonic interconnects for data). ESA's investment in a European rad-hard FPGA on an entirely European supply chain represents a parallel strategic approach.

Entry points for student teams

The two radiation effects need two different machines, and only one of them is anywhere near a student team. A cobalt-60 source gives total ionizing dose only — dose-accumulated drift in a commercial microcontroller's current draw, clock stability, and memory retention — and that arm requires a university health-physics or nuclear-engineering department that already holds a licensed Co-60 irradiator and will supervise the exposures; single-event upset rates cannot be measured there at all, because they need heavy-ion or proton beam time at one of a handful of facilities (Texas A&M's Cyclotron Institute Radiation Effects Facility, https://cyclotron.tamu.edu/ref/, runs dedicated heavy-ion and proton lines for this and schedules beam time by request), which is a funded-program access, not a semester one. The door that needs no beam and no license is the software-mitigation half done against real cross-sections: NASA Goddard's radiation database publishes decades of its own test reports openly (https://nepp.nasa.gov/radhome/RadDatabase/RadDataBase.html), so a team can take measured SEU cross-sections for a specific commercial part family, fold them through a chosen orbit's particle environment, and then evaluate TMR voting, checkpoint/rollback, and watchdog schemes by fault injection in emulation — reporting the compute, power, and mass cost of each mitigation at a given upset rate. The chiplet arm is equally tractable without a facility: design and simulate a hardened supervisory core managing a higher-performance commercial compute core, and map how much radiation hardening can be delegated to architecture rather than fabrication.